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Fault-tolerant architectures are crucial to the evolution of quantum computation. For a largescale, universal quantum computer to appear, fault-tolerant architectures must be established, making this one of the most vital development areas of quantum information processing. Since the first successful quantum error correction protocols in the 1990s, there has been a world-wide growth in technological roadmaps towards large scale fault tolerant quantum computers. The ultimate goal of quantum computing is to build devices that dramatically outperform existing classical computers, the realisation of which will yield a new era in computing.
Program leader: A/Prof Simon Devitt
Key members: Dr Madhav Vijayan, Dr Sam Elman, Dr Thinh Le.
Roadmap to quantum supremacy
UTS:QSI research strives to put fault tolerant operation within reach, by identifying tasks that demonstrate quantum supremacy in the easiest, and cheapest, way possible. This involves theoretically identifying experimental benchmarks, designing architectures capable of achieving them, and working with experimental teams to bring it to reality.
Benchmarks, applications, and architectures
This research creates a bridge between the mathematically rigorous study of algorithms and software, and the challenges faced by experimentalists and engineers in the lab. Our goal is to develop interesting computational tasks that are experimentally viable that are clearly on the pathway to scaling-up to more ambitious quantum computing architectures. We are working with experimental teams to optimize their architectures informed by the latest developments in the theory of quantum algorithms, complexity, and error correction. Over the next few years our team will be focussed on developing applications built on these results. Key to such questions is classifying the computational complexity of quantum simulation and sampling protocols, an area in which our team has a large amount of experience.
Verification and validation
As quantum computing experiments become increasingly sophisticated the verification and validation of prototype devices poses a major challenge for experimental teams. The number of degrees of freedom required to fully describe a quantum computation grows exponentially with the size of a quantum circuit, this fact is one of the key reasons for the power of quantum computers but it has the downside that it makes device characterization extremely difficult. Fully developing quantum machine learning and compressed sensing techniques will be the key to overcoming this roadblock to developing scalable quantum computers.